1. Field of the Invention
The invention relates generally to a circuit configuration and method of manufacture of an electronic device protected by an electrostatic discharge (ESD) protection circuit. More particularly, this invention relates to an improved circuit configuration and method of manufacture of a electronic device protected by an ESD protection circuit having a compact device configuration for operating at a high voltage while manufactured with simplified processing steps without requiring additional masks.
2. Description of the Relevant Art
Current technologies for designing and manufacturing the electronic devices with electrostatic discharge (ESD) protection circuits, especially for electronic devices operated at high voltages, e.g., up to 18 volts or higher, are still confronted with technical difficulties and limitations. The manufacturing technologies and device configurations implemented for these types of high voltage ESD protection circuits generally required additional number of masks. Furthermore, the high voltage ESD protection circuits occupy larger areas. For these reasons, high voltage ESD protection circuits become expensive to implement.
Therefore, a need still exists in the fields of circuit design and device manufactures for providing a new and improved circuit configuration and manufacturing method to resolve the above-discussed difficulties. Specifically, a need still exists to provide new and improved ESD protection circuits that can perform good voltage clamping function at higher voltage ranges, occupying smaller areas and providing high voltage ESD functions while being manufacturable by applying lightly doped drain (LDD) complementary metal oxide semiconductor (CMOS) technologies.